Company Description:
We are creating the future of brain-computer interfaces: building devices now that have the potential to help people with paralysis regain mobility and independence and invent new technologies that could expand our abilities, our community, and our world.
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description & Responsibilities:
Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.
- Micro-architecture design and RTL implementation of:
- Low-power digital signal processors
- Low-power general-purpose hardware accelerators
- Low-power graphics processing units
- Low-power radio MAC/PHY
- Low-power serial link MAC/PHY
- Design and optimization of hardware/software interface with firmware engineers
- Application-specific architecture optimization including:
- Complex system modeling for energy and performance benchmarks
- Workload analysis and modeling
- Energy/performance profiling and analysis
- Leveraging architecture-level design trade-offs with process technology and workload type
- Balancing cost and performance under manufacturing process variation
- Collaboration on silicon bring-up tests with verification engineers
Required Qualifications:
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- 5+ years of experience in digital design
- Expertise in SystemVerilog, C/C++, Python
- Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
- Experience in designing digital signal processing pipelines, from algorithm to RTL
Preferred Qualifications:
- Experience in architecture optimization with process technology customization
- Experience in the verification of complex digital systems, using industry standard tools
- Experience in the physical design of complex digital systems, using industry standard tools
- Experience testing and debugging digital system-on-a-chips
- Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
- Experience automating tool flows
- Experience with embedded design
- Experience in processor instruction set architecture design
- Experience in compiler back-end design and customization
Pay Transparency: The following details are for Texas individuals only:
Texas Pay Transparency
$101,300—$210,400 USD
For Full-Time Employees, your compensation package will include two major components: salary and equity. Guidance on salary for this role will be determined according to the level at which you enter the organization, with the ability to gain more over time as you contribute. In addition, Full-Time Employees are eligible for the following benefits listed below.
What We Offer:
- An opportunity to change the world and work with some of the smartest and most talented experts from different fields
- Growth potential; we rapidly advance team members who have an outsized impact
- Excellent medical, dental, and vision insurance through a PPO plan
- Paid holidays
- Commuter benefits
- Meals provided
- Equity + 401(k) plan *Temporary Employees & Interns excluded
- Parental leave *Temporary Employees & Interns excluded
- Flexible time off *Temporary Employees & Interns excluded
Multiple studies have found that a higher percentage of women and BIPOC candidates won't apply if they don't meet every listed qualification. Neuralink values candidates of all backgrounds. If you find yourself excited by our mission but you don't check every box in the description, we encourage you to apply anyway!
Neuralink provides equal opportunity in all of our employment practices to all qualified employees and applicants without regard to race, color, religion, gender, national origin, age, disability, marital status, military status, genetic information or any other category protected by federal, state and local laws. This policy applies to all aspects of the employment relationship, including recruitment, hiring, compensation, promotion, transfer, disciplinary action, layoff, return from layoff, training and social, and recreational programs. All such employment decisions will be made without unlawfully discriminating on any prohibited basis.
If you need a reasonable accommodation at any point in the interview process, please let us know. Reasonable accommodations are modifications or adjustments to the application or hiring process that would enable you to fully participate in those processes. Examples of reasonable accommodations include but are not limited to:
- Documents in alternate formats or read aloud to you
- Having interviews in an accessible location
- Being accompanied by a service dog
- Having a sign language interpreter present for the interview
Top Skills
What We Do
Neuralink is a team of exceptionally talented people. We are creating the future of brain-machine interfaces: building devices now that will help people with paralysis and inventing new technologies that will expand our abilities, our community, and our world.
Our goal is to build a system with at least two orders of magnitude more communication channels (electrodes) than current clinically-approved devices. This system needs to be safe, it must have fully wireless communication through the skin, and it has to be ready for patients to take home and use on their own. Our device, called the Link, will be able to record from 1024 electrodes and is designed to meet these criteria.
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